Development of an efficient testing methodology for system on chip design

Please use this identifier to cite or link to this item: http://ir.nbu.ac.in/handle/123456789/1412

Title:	Development of an efficient testing methodology for system on chip design
Other Titles:	Bhaumik, Haripada and Chattopadhyay, Santanu
Authors:	Das, Gautam
Keywords:	Testing methodology Chip design
Issue Date:	2009
Publisher:	University of North Bengal
Series/Report no.:	Accession Number;223076
URI:	Th 620.0042:D229d http://ir.nbu.ac.in/handle/123456789/1412
Appears in Collections:	Department of Engineering

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File	Description	Size	Format
01_title.pdf		24.26 kB	Adobe PDF	View/Open
02_dedicated.pdf		27.76 kB	Adobe PDF	View/Open
03_acknowledgement.pdf		35.93 kB	Adobe PDF	View/Open
04_declaration.pdf		9.1 kB	Adobe PDF	View/Open
05_certificate.pdf		32.46 kB	Adobe PDF	View/Open
06_abstract.pdf		36.81 kB	Adobe PDF	View/Open
07_table of contents.pdf		69.32 kB	Adobe PDF	View/Open
08_list of figures.pdf		71.6 kB	Adobe PDF	View/Open
09_list of tables.pdf		40.42 kB	Adobe PDF	View/Open
10_list of algorithm.pdf		14.62 kB	Adobe PDF	View/Open
11_list of abbreviations.pdf		50.71 kB	Adobe PDF	View/Open
12_chapter_01.pdf		203.5 kB	Adobe PDF	View/Open
13_chapter_02.pdf		1.7 MB	Adobe PDF	View/Open
14_chapter_03.pdf		636 kB	Adobe PDF	View/Open
15_chapter_04.pdf		1.06 MB	Adobe PDF	View/Open
16_chapter_05.pdf		750.66 kB	Adobe PDF	View/Open
17_chapter_06.pdf		606.96 kB	Adobe PDF	View/Open
18_chapter_07.pdf		60.36 kB	Adobe PDF	View/Open
19_references.pdf		730.72 kB	Adobe PDF	View/Open
223076.pdf	Full Thesis	6.22 MB	Adobe PDF	View/Open